Efficient Register Assignment through Reallocation

In modern superscalar microarchitectures, access to register file lies on the critical schedule-to-execute path, necessitating smaller files in order to achieve higher clock frequencies. In this paper, we propose innovative register allocation mechanisms to increase the parallelism exploited from smaller register files. Our techniques introduce write-afterread dependencies to facilitate register reallocation. Specifically, the key idea of our register reallocation technique is to reallocate a register (with one consumer) either to the consumer instruction or to an instruction that is dependent on the consumer, creating write-after-read dependencies. This approach guarantees that a register is not overwritten before it is required. In fact, false dependencies are created in some situations to increase the instances of register reallocation. Our experiments show that the technique achieves significant IPC (Instructions Per Cycle) speedup across the simulated SPEC 2000 benchmarks. With our register reallocation technique, a 64-entry register file configuration gives more than 40% IPC improvement, sometimes performing even better than a 128-entry register file configuration.